Racetrack logic: smart in-memory processing

Existing solutions on the market do not offer a real solution to the problem, they do not allow the execution of logic functions directly within the memory cell. In the current Von-Neumann paradigm, the data to be processed are transported outside the memory, processed and stored again within the memory. In the literature, some solutions are proposed, defined as “near memory”. Here, some specific functions are performed externally to the processor to reduce the latency given by the data transfer from the memory. However, this solution solves just partially the problem under analysis, in fact, while optimizing some specific processes, the classic paradigm remains unchanged. Some well-known smartphone manufacturers are currently investing huge resources in researching new architectures aiming to improve the interaction between CPU and memories by using classic CMOS technology. Recently, modern architectural designs shows the integration of  CPU and GPU with a high-performance shared memory.

The solution proposed with racetrack memories represents a further advance in the search for effective solutions, based on a technology intrinsically endowed with unique physical characteristics, capable of integrating logic and memory functions, which the CMOS currently used cannot achieve.

The realization of the racetrack memories is based on a multilayer stack of CoFeB and MgO. After being deposited through a deposition process, it is structured to obtain the magnetic strips necessary to store data.

By means of electrical contacts, suitably defined at the ends of the strips of magnetic material, it is possible to move data by exploiting a current that passes through the material.

The € 50k loan, granted by the Compagnia di San Paolo and Liftt in 2021, made it possible to accelerate the development of the prototype by validating the individual elements of the manufacturing process.

The roadmap for the realisation of a complete prototype requires to:

1. Validate the 3D manufacturing process started during the financed activities (just ended)
2. Experimentally create a device with multiple memory cells. In this prototype, MTJ devices have been adopted for writing and TMR devices were adopted for reading data
3. Get in touch with potential investors in the semiconductor industry interested in obtaining the patent under license We are currently in contact with a research laboratory located in Munich which gives us free access to its laboratories and in particular to the “clean room”. It is also required to cover the cost of personnel (PhD or researcher) who will have to carry out the experiments as well as the cost of consumables.